Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-07-20
2001-03-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C428S208000, C428S208000
Reexamination Certificate
active
06207509
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates a method of manufacturing a semiconductor device or a semiconductor memory device, and in particular, to a method of manufacturing a semiconductor device having various kinds of gate insulating films.
2. Description of the Related Art
For example, a semiconductor device, such as, a DRAM (Dynamic Random Access Memory) or a SRAM (Static Random Access Memory) is generally composed of a plurality of insulating gate field effect transistors (thereinafter, referred to as a MOS transistor).
With low power consumption and low operation voltage, various kinds of gate insulating films are used for the MOS transistor constituting such a semiconductor device.
For example, a silicon oxide film as the gate insulating film is thinly formed in a thickness in the MOS transistor constituting an internal circuit of the semiconductor device. In contrast, the silicon oxide film as the gate insulating film is thickly in a thickness in the MOS transistor constituting an external circuit of the semiconductor device. Thus, the various kinds of gate insulating films are used for the respective MOS transistors in a memory semiconductor device.
In the meanwhile, a floating gate type MOS transistor is used in addition to a normal type MOS transistor in a flash memory semiconductor device of an EEPROM (Electrically Erasable Programmable ROM) type. In this event, a gate insulating film of the normal type MOS transistor is formed different from a tunnel oxide film of the floating gate MOS transistor in the kind.
Referring to
FIG. 1
, description will be made about the floating type MOS transistor.
Specifically, field oxide films
102
are selectively formed for desired regions on a surface of a silicon substrate
101
by the use of the known thermal oxidation process, as illustrated in FIG.
1
. In this case, a gate oxide film
103
serves as the gate insulating film in the MOS transistor on a peripheral region of the flash memory semiconductor device. Herein, the gate oxide film
103
is formed on the surface of the silicon substrate
101
in an active region surrounded by the field oxide films
102
.
Further, a gate electrode
104
is formed on the gate oxide film
103
. Herein, it is to be noted that the gate oxide film
103
may be a silicon oxide film which is formed by the use of the thermal oxidation process.
Moreover, the floating gate MOS transistor in a memory cell region, which is the internal region of the flash memory semiconductor device, has a tunnel oxide film
105
. Herein, the tunnel oxide film
105
is formed on the surface of the silicon substrate
101
in the active region surrounded by the field oxide films
102
in the same manner.
Further, a floating gate electrode
106
is formed on the tunnel oxide film
105
. An intermediate insulating film
107
is deposited on a surface of the floating gate electrode
106
. In addition, a control gate electrode
108
is formed on the intermediate insulating film
107
. Herein, it is to be noted that the tunnel oxide film
105
may be a silicon oxide film which is a thin film formed by the thermal oxidation process.
Subsequently, description will be made about a method of forming the above-mentioned tunnel oxide film
105
and the gate oxide film
103
with reference to
FIGS. 2A through 2C
.
The field oxide films
102
are formed on the surface of the silicon substrate
101
which has a conductive type of a P-type by the use of the known LOCOS Local Oxidation of Silicon) method, as illustrated in FIG.
2
A. Further, the surface of the silicon substrate
101
,which is the active region, is thermally oxidized to form a sacrifice oxide film
109
.
Next, a resist mask
110
, which covers the peripheral region and has an opening portion in the memory cell region, is formed by the use of the known photolithography technique, as illustrated in FIG.
2
B. Further, the sacrifice oxide film
109
in the memory cell region is completely removed by using the resist mask
110
as an etching mask.
Herein, it is to be noted that chemical liquid, such as, buffered hydrofluoric acid is used in the above-mentioned etching process. Consequently, the surface of the silicon substrate
111
is exposed, as shown in FIG.
2
B. In this case, the sacrifice oxide film
109
a
is left in the peripheral region.
Subsequently, the resist mask
110
is removed by the use of organic solvent. Further, the surface of the silicon substrate
101
is cleaned in a washing process. In consequence, the tunnel oxide film
105
is deposited on the surface
111
of the silicon substrate
101
, as illustrated in FIG.
2
C. In such a thermal oxidation step, a region, in which the sacrifice oxide film
109
a
is left, is not almost oxidized.
Thereinafter, referring to
FIG. 1
together, after the floating gate electrode
106
and the intermediate insulating film
107
are formed, the above-mentioned sacrifice oxide film
109
a
is removed. Further, the gate oxide film
103
is deposited by the use of the thermal oxidation process. Herein, it is to be noted that the intermediate insulating film
107
is formed by a silicon nitride film and the like.
Thus, the tunnel oxide film
105
of the floating gate MOS transistor and the gate oxide film
103
of the normal type MOS transistor are formed, respectively, as illustrated in FIG.
1
.
However, uniformity of a film thickness of the formed tunnel oxide film
105
is degraded in the above-described related technique. This is because large irregularities are readily generated on the exposed surface
111
of the silicon substrate
101
in the etching step by the use of the chemical liquid described with respect to FIG.
2
B. Namely, micro-roughness on the surface of the silicon substrate
101
becomes large in this case.
Further, etching rate of the sacrifice oxide film
109
by the chemical liquid is set so as to become high to achieve mass production in the related technique. Consequently, variation or fluctuation of the etching process becomes large in a semiconductor wafer as the silicon substrate
101
.
Moreover, variation of the etching process also becomes large at an edge portion
112
of the field oxide film
102
illustrated in FIG.
2
C. This is because withdrawal or recession of the etched field oxide film
102
is different in dependency upon wafer positions. In consequence, areas of the active region are largely varied. Thereby, areas, in which the tunnel oxide film
105
is deposited, are also varied on the wafer.
The above-mentioned variation with respect to the thickness of the tunnel oxide film and variation with respect to the area of the tunnel oxide film cause characteristic variation of the flash memory semiconductor device. In particular, variation with respect to erasing characteristic of the flash memory inevitably occurs.
In consequence, manufacturing yield of the semiconductor device, such as, the flash memory semiconductor device is lowered. Further, manufacturing cost of such a semiconductor device is increased.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a method of manufacturing a semiconductor device which is capable of reducing or eliminating micro-roughness.
It is another object of this invention to provide a method of manufacturing a semiconductor device which is capable of readily forming various kinds of gate insulating films.
According to this invention, a first sacrifice oxide film is formed on a substrate.
Next, a second sacrifice oxide film is formed on the substrate by etching the first sacrifice oxide film to a predetermined depth in a first etching process. Herein, the second sacrifice oxide film is thinner than the first sacrifice oxide film.
Subsequently, the second sacrifice oxide film is completely removed from a surface of the substrate in a second etching process so as to expose the surface of the substrate.
Finally, an oxide film is formed on the exposed surface of the substrate.
In this case, the first etching process is carried out at a first etching rate while the second etching proc
Le Dung Anh
NEC Corporation
Nelms David
Young & Thompson
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