Method of manufacturing a select transistor in a NAND flash...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S289000, C438S238000, C438S381000, C257SE21008, C257S654000, C257S657000, C256S013000, C256S013000

Reexamination Certificate

active

11101672

ABSTRACT:
Disclosed herein is a method of manufacturing a flash memory device. According to the present invention, a method of manufacturing a NAND flash memory device having a memory cell and a select transistor, wherein a graph showing the relation between the length of a gate electrode of the select transistor and the leakage current of the select transistor, and a graph showing the relation between an ion implant dose for controlling a threshold voltage of a memory cell and the leakage current of the select transistor are provided includes the steps of finding the leakage current of a select transistor, which corresponds to the length of a gate electrode of a current select transistor, and finding an ion implant dose for controlling a threshold voltage of a memory cell, which corresponds to the leakage current, and finding the leakage current of a select transistor, which allows the ion implant dose for controlling the threshold voltage of the memory cell to become an ion implant dose for controlling a threshold voltage of a desired memory cell, and finding and increasing the length of the gate electrode of the select transistor, which corresponds to the leakage current of the select transistor.

REFERENCES:
patent: 5559351 (1996-09-01), Takiyama
patent: 5877054 (1999-03-01), Yamauchi
patent: 6009017 (1999-12-01), Guo et al.
patent: 6456535 (2002-09-01), Forbes et al.
patent: 6465834 (2002-10-01), Nakazato et al.
patent: 6898116 (2005-05-01), Peng
patent: 7011999 (2006-03-01), Minami et al.
patent: 7084037 (2006-08-01), Gamo et al.

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