Method of manufacturing a power semiconductor device

Details Method of manufacturing a power semiconductor device Method of manufacturing a power semiconductor device

1995-11-09

1999-02-09

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438273, H01L 21336

Patent

active

058693726

ABSTRACT:
A semiconductor device manufacturing process is disclosed in which one processing step is reduced by replacing the photoresist film conventionally used for masking in the formation of the heavily doped n-type layer by an oxide film, and by monitoring, in the monitor region, the simultaneous formation of the contact holes in the oxide films different in the respective thickness thereof. An n+ region is formed by using a second insulation film and a polysilicon gate electrode formed on a semi-conductor wafer as masks for implanting arsenic ions. Further, a contact hole to be formed on a p-type region covered with a fourth insulation film and a second insulation film and a contact hole to be formed on the n+ region covered with the fourth insulation film are formed simultaneously under the monitoring of the formation of the contact holes in a monitor region.

REFERENCES:
patent: 3933528 (1976-01-01), Sloan, Jr.
patent: 5550067 (1996-08-01), Kuroyanagi et al.
patent: 5559045 (1996-09-01), Yamamoto
patent: 5563437 (1996-10-01), Davies et al.

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