Method of manufacturing a nonvolatile semiconductor memory...

Details Method of manufacturing a nonvolatile semiconductor memory... Method of manufacturing a nonvolatile semiconductor memory...

2007-10-16

2007-10-16

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S259000, C438S270000

Reexamination Certificate

active

11036023

ABSTRACT:
An AND flash memory of the type wherein a memory cell is constituted of n-type semiconductor regions (a source and a drain) formed in a p-type well of a semiconductor substrate and three gates (including a floating gate, a control gate and a selective gate) is manufactured. In the manufacture, arsenic (As) is introduced into a p-type well in the vicinity of one of side walls of the selective gate to form n-type semiconductor regions (a source and a drain). Thereafter, to cope with a drain disturb problem, the substrate is thermally treated by use of an ISSG (In-Situ Steam Generation) oxidation method so that a first gate, insulating film disposed in the vicinity of one of side walls, at which the n-type semiconductor regions have been formed, is formed thick.

REFERENCES:
patent: 2003/0181007 (2003-09-01), Huang et al.
patent: 2001-028428 (2001-01-01), None
patent: 2001-156275 (2001-06-01), None

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