Method of manufacturing a nonvolatile memory cell with...

Details Method of manufacturing a nonvolatile memory cell with... Method of manufacturing a nonvolatile memory cell with...

2006-03-14

2006-03-14

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S593000

Reexamination Certificate

active

07012004

ABSTRACT:
A method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof. A gate structure is formed on a substrate. Diffusion regions are formed in the substrate on either side of the gate structure. A linear oxide layer is formed on the gate structure and the substrate. A conformal nitride layer is formed on the linear oxide layer. The nitride layer and the linear oxide layer are partially etched back to form linear oxide spacers on the sides of the gate structure and nitride spacers on the sides of the linear oxide spacers. A conformal oxide layer is formed on the linear oxide spacers, the nitride spacers, the gate structure and the substrate. The oxide layer is partially etched back to form oxide spacers on the sides of the nitride spacers.

REFERENCES:
patent: 6686242 (2002-09-01), Willer et al.
patent: 6555865 (2003-01-01), Lee et al.
patent: 6627504 (2003-09-01), Bertrand et al.
patent: 6677201 (2004-01-01), Bu et al.
patent: 452977 (2001-09-01), None

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