Method of manufacturing a flash memory structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438296, 438529, H01L 218247

Patent

active

061035777

ABSTRACT:
A flash memory structure is formed by a method comprising the steps of providing a semiconductor substrate, and then forming a shallow first trench within the substrate. Thereafter, a buried doped region is formed underneath the first trench so that the buried doped region is at a distance from the substrate surface. The buried doped region is one major aspect in this invention that can be applied to the processing of shallow trench isolation and is capable of reducing device area. Next, a deeper second trench is etched in the substrate. The second trench has a greater depth than the depth of the first trench. Subsequently, insulating material is deposited into the first and the second trench, and then a stacked gate structure is formed above the substrate. Later, the surface source region and drain region are formed on two sides of the stacked gate structure. Through thermal operation, the surface source region alternately connects with the buried doped region to form a buried common source region.

REFERENCES:
patent: 4713142 (1987-12-01), Mitchell et al.
patent: 5371030 (1994-12-01), Bergemont
patent: 5506160 (1996-04-01), Chang
patent: 5635415 (1997-06-01), Hong
patent: 5817564 (1998-10-01), Church et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing a flash memory structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a flash memory structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a flash memory structure will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2006008

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.