Method of manufacturing a flash memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S258000, C438S275000

Reexamination Certificate

active

07544567

ABSTRACT:
In a method of manufacturing an SONOS type flash memory device, a first oxide layer and a buffer poly layer are formed over a surface of a semiconductor except for a memory cell region of a cell region. A second oxide layer, a nitride layer and a third oxide layer are formed. The poly buffer layer is exposed by etching specific regions in a peri region and in a DSL/SSL region of the cell region. A conductive layer is formed to electrically connect to the poly buffer layer. The third oxide layer, the nitride layer and the second nitride layer are selectively etched to form a gate of the memory cell region of the cell region. The buffer poly layer is selectively etched to form a gate in the DSL/SSL region of the cell region and a gate in the peri region.

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patent: 7045850 (2006-05-01), Kim et al.
patent: 7172940 (2007-02-01), Chen et al.
patent: 2007/0281423 (2007-12-01), Shih et al.
patent: 10-2001-0063502 (2001-07-01), None
patent: 10-2002-0029205 (2002-04-01), None
patent: 10-2006-0011078 (2006-02-01), None
patent: 10-2006-0046904 (2006-05-01), None

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