Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-11-23
2001-09-04
Nguyen, Tuan H. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S261000, C438S267000
Reexamination Certificate
active
06284598
ABSTRACT:
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH AND DEVELOPMENT
Not Applicable
FIELD OF THE INVENTION
This invention relates to the manufacturing of semiconductor devices. More specifically, the invention relates to a method of manufacturing an improved flash memory cell and the product of that method.
BACKGROUND OF THE INVENTION
The need for a nonvolatile means of storage for semiconductor devices has led to the development of floating gate reprogramable EEPROMS, also known as flash memory. A nonvolatile means of storage allows the device to retain data without the need to have power applied to the device. Additionally, the flash memory is reprogramable, which allows for reduced time to market for new products and the ability to upgrade existing designs by reprogramming the device after manufacturing.
Many flash memory architectures have been developed and include the thin oxide stacked gate approach, the thin oxide two transistor cell, and the thick oxide split-gate cell. These architectures function in similar manner as the charge stored on a floating gate within the cell sets the memory transistor to a logical “1” or “0”. Depending upon the type of transistor, whether an enhancement or depletion transistor, the lack of or presence of electrons on the floating gate will determine whether the memory cell will or will not conduct during read. With a split gate cell, the floating gate transfers electrons across an interpoly oxide to erase. High voltage on the control gate establishes a localized electric field that initiates the Fowler-Nordheim tunneling mechanism.
An example method of producing a floating gate of a split gate cell includes: growing an oxide over a silicon substrate to form a tunnel oxide; depositing a doped poly-silicon over the tunnel oxide; and using lithography to form a floating gate. This particular method creates sharp corners on the floating gate, and these sharp corners are subsequently transferred to a gate oxide formed over the floating gate and also to a control gate formed over the gate oxide.
A problem with the sharp corners of the floating gate and control gate is that they create a strong localized field at the gate oxide disposed between them. This strong field can create electron trap sites. Eventually during use, sufficient electrons will be trapped in these electron trap sites to prevent single bits in the flash memory cell from being erased. Because the electrons become untrapped between erases of the flash memory cell, methods of preventing failures caused by the trapped electrons include having additional erase cycles or waiting sufficient time between the erase/program cycle for the electrons to be untrapped before reusing the flash memory cell. However, these methods disadvantageously slow the operation of the semiconductor device in which the split gate cells are used.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a flash memory cell and a method of forming a flash memory cell having improved data retention characteristics and reduced cycle time between erasure and programming of the cell.
It is yet another object of the invention to provide a flash memory cell and a method of forming a flash memory cell having a thinner gate oxide between a floating gate and a control gate.
It is another object of the invention to provide a flash memory cell and a method of forming a flash memory cell having a gate oxide which produces a reduced electric field.
It is a further object of the invention to provide a flash memory cell and a method of forming a flash memory cell having rounded corners between the floating gate and the gate oxide and between the gate oxide and the control gate.
It is still another object of the invention is to provide a flash memory cell and a method of forming a flash memory cell having a capacitor circuit with improved coupling coefficients.
These and other objects of the invention are achieved by the subject method and device.
Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of the present invention, the preferred methods and materials are described below.
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Fritzinger Larry B.
Kelley Patrick J.
Lee Cynthia C.
Molloy John Simon
Singh Ranbir
Agere Systems Guardian Corp.
Kebede Brook
Nguyen Tuan H.
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