Method of manufacturing a dual bit flash memory

Details Method of manufacturing a dual bit flash memory Method of manufacturing a dual bit flash memory

2007-04-17

2007-04-17

Pham, Thanhha S. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S264000

Reexamination Certificate

active

10710672

ABSTRACT:
A method of manufacturing a non-volatile memory cell is described. The method includes forming a first dielectric layer on a substrate and then forming a patterned mask layer with a trench on the first dielectric layer. A pair of charge storage spacers is formed on the sidewalls of the trench. The patterned mask layer is removed and then a second dielectric is formed on the substrate covering the pair of charge storage spacers. A conductive layer is formed on the second dielectric layer and subsequently patterned to form a gate structure on the pair of charge storage spacers. Portions of the second and first dielectric layers outside the gate structure are removed and then a source/drain region is formed in the substrate on each side of the conductive gate structure.

REFERENCES:
patent: 5714412 (1998-02-01), Liang et al.
patent: 6734055 (2004-05-01), Lin et al.
patent: 2003/0235951 (2003-12-01), Hashimoto
patent: 2004/0119109 (2004-06-01), Kang

Affiliated with

Also associated with

Rating

Method of manufacturing a dual bit flash memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a dual bit flash memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a dual bit flash memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3724066