Method of manufacturing a dielectric layer in a memory...

Details Method of manufacturing a dielectric layer in a memory... Method of manufacturing a dielectric layer in a memory...

2008-04-22

2008-04-22

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S591000, C438S775000, C257SE21679

Reexamination Certificate

active

11033156

ABSTRACT:
A method for manufacturing a dielectric layer structure for a non-volatile memory cell is provided. A method includes forming a first dielectric layer for tunneling on a semiconductor substrate, a second dielectric layer on the first dielectric layer to store charges, nitrogenizing surface of the second dielectric layer, and forming a third dielectric layer the nitridedsecond dielectric layer.

REFERENCES:
patent: 6548425 (2003-04-01), Chang et al.
patent: 6620705 (2003-09-01), Ogle et al.
patent: 6750157 (2004-06-01), Fastow et al.
patent: 2003/0082884 (2003-05-01), Faltermeier et al.
patent: 2003/0139065 (2003-07-01), Han
patent: 2003/0148628 (2003-08-01), Tay et al.
patent: 2003/0194853 (2003-10-01), Jeon
patent: 2003/0232507 (2003-12-01), Chen

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