Method of manufacturing a barrier metal layer using atomic...

Details Method of manufacturing a barrier metal layer using atomic... Method of manufacturing a barrier metal layer using atomic...

2001-04-06

2002-06-04

Chaudhuri, Olik (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S643000, C438S648000, C438S653000, C438S656000, C438S685000, C427S253000, C427S255290

Reexamination Certificate

active

06399491

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor devices. More particularly, the present invention relates to a method of manufacturing a barrier metal layer using atomic layer deposition.
2. Description of the Related Art
In the manufacture of semiconductor devices, a barrier metal layer (for example, a TiN layer, a TaN layer, a WN layer) may be formed between adjacent material layers in order to prevent mutual diffusion or a chemical reaction from occurring between the adjacent material layers. For example, in the manufacture of a semiconductor memory device having a capacitor over bit-line (COB) structure, barrier metal layers are typically interposed between a lower electrode of a capacitor and a contact plug, between a dielectric layer of a capacitor and an upper electrode of the capacitor, between a conductive line and an insulating layer, and between a via contact and an insulating layer.
However, as the integration density of semiconductor devices increases, the topography of the surface on which a barrier metal layer is to be deposited becomes more rugged. When a barrier metal layer is formed on a rugged surface by a physical deposition process such as sputtering, the step coverage of the barrier metal layer is poor. Accordingly, a process providing excellent step coverage must be used to form a barrier metal layer on a deposition surface having a rugged topography. To this end, chemical vapor deposition (CVD) has been proposed. Hereinafter, a barrier metal layer formed by CVD will be referred to as a CVD barrier metal layer.
In the process of manufacturing a CVD barrier metal layer, a precursor including a halogen, such as Cl, is used as a typical metal source gas. The manufacturing process of a CVD barrier metal layer has an advantage in that the barrier metal is deposited rapidly, and a drawback in that the halogen of the precursor fails to fall out of the barrier metal layer and remains as an impurity within the barrier metal layer. The halogen remaining within the barrier metal layer as described above may cause an adjacent material layer (for example, an aluminum conductive line) to erode, and may increase the resistivity of the barrier metal layer. Thus, the amount of halogen remaining within the barrier metal layer must be reduced so as to decrease the resistivity of the barrier metal layer. In order to achieve this, the CVD barrier metal layer manufacturing process must be performed at a high temperature.
For example, in a CVD barrier metal layer manufacturing process using TiCl
4
as a metal source gas, a deposition temperature of at least 675° C. is required to obtain a resistivity of 200 &mgr;&OHgr;-cm or less. However, when a barrier metal layer is fabricated at a deposition temperature of 600° C. or greater, the thermal budget of an underlayer formed below the barrier metal layer is quite high, and secondary problems such as the generation of thermal stress are created. For instance, a CVD barrier metal layer must be formed over an Si contact or a via contact at a deposition temperature of 500° C. or less if the Si contact or via contact are not to be unduly thermally stressed. That is, the CVD barrier metal layer manufacturing process must be performed at a low temperature. A method of adding methylhydrazine (MH) to a metal source gas TiCl
4
can be used to facilitate the deposition of the barrier metal at a low temperature. However, this technique has a drawback in that the step coverage of the barrier metal layer is compromised.
The above-described problem of thermal stress, prevailing in the method of forming a CVD barrier metal layer manufacturing using a metal source gas such as TiCl
4
as a precursor, can be overcome by using an organometallic precursor such as tetrakis diethylamino Ti (TDEAT) or tetrakis dimethylamino Ti (TDMAT). That is, this so-called MOCVD barrier metal layer manufacturing process can be performed at a low temperature compared to the CVD barrier metal layer manufacturing process. However, a MOCVD barrier metal layer includes a large quantity of carbon impurities and therefore, exhibits a high resistivity. Also, the MOCVD barrier metal layer has worse step coverage than a barrier metal layer that is formed using a metal source gas such as TiCl
4
as a precursor.
Alternatively, the problems in the CVD barrier metal layer manufacturing process posed by using a metal source gas such as TiCL
4
as a precursor can be overcome by a technique of flushing the entire surface of a semiconductor substrate with an impurity-removing gas after the barrier metal layer is formed. However, the rate at which the impurity-removing gas must flow to flush the surface of the semiconductor substrate is several tens to several hundreds of times greater than that at which the reaction gas flows into the reaction chamber. Accordingly, this technique requires controlling the process conditions prevailing in the reaction chamber, such as the pressure of the chamber and the like. Effecting such a control takes time and thus, increases the total time of the manufacturing process.
Also, a method of forming a barrier metal layer using an atomic layer deposition (ALD) process has been used in an attempt to overcome the problems posed by the use of Cl in the CVD barrier metal layer manufacturing process. The conventional barrier metal layer forming method using ALD has an advantage in that it can be performed at a low temperature while minimizing the content of Cl in the barrier metal layer. However, the mechanism by which the barrier metal is deposited in ALD is chemical adsorption. Therefore, the conventional barrier metal layer forming method using ALD has a drawback in that the deposition rate is too slow for use in manufacturing semiconductor devices. As a comparison, the deposition rate of a typical CVD process used to form a TiN layer is approximately several hundreds of Å/min. On the other hand, the deposition rate at which a TiN layer can be formed using the conventional ALD process is less than 100 Å/min, which is very slow compared to when the CVD process is used.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method of manufacturing a barrier metal layer that makes use of atomic layer deposition (ALD) but in which the deposition rate is not too slow.
A second object of the present invention is to provide a method of manufacturing a barrier metal layer using ALD, and by which the deposition rate at which the ALD occurs can be increased without an accompanying increase in the amount of impurities being left in the barrier metal layer.
To achieve the first above object, the present invention provides a method of manufacturing a barrier metal layer including: (a) supplying a first source gas onto the entire surface of a semiconductor substrate in the form of a pulse having a duration lasting from a point in time A
1
to a point in time A
2
, and (b) supplying a second source gas, which reacts with the first source gas, onto the entire surface of the semiconductor substrate in the form of a pulse having a duration lasting from a point in time A
3
to a point in time A
4
, wherein A
3
is at least as early in time as A
1
and no later in time than A
2
. Preferably, point in time A
4
is no earlier than point in time A
2
. Moreover, the points in time the pulse of the first source gas begins and ends can be the same as those at which the pulse of the second source gas begins and ends. That is, point in time A
1
can coincide with point in time A
3
, and point in time A
2
can coincide with point in time A
4
.
A purge gas can be used to discharge by-products of the reaction between the first and second source gases. The purge gas is supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is earlier than or that coincides with point in time A
1
. Alternatively, the purge gas can be supplied onto the entire surface of the semiconductor substrate beginning at a point in time that is later than po

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