Method of making transistor with strained source/drain

Details Method of making transistor with strained source/drain Method of making transistor with strained source/drain

2006-10-10

2006-10-10

Tran, Long (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S188000, C438S154000, C257S069000, C257SE21131, C257SE21431

Reexamination Certificate

active

07118952

ABSTRACT:
A method of fabricating a transistor comprises the steps of: forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing, forming recesses in the semiconductor substrate at respective locations where a source region and a drain region are to be formed, epitaxially growing a second semiconductor material having a second lattice spacing different from the first lattice spacing in the recesses, and implanting a dopant in the second semiconductor material after the growing step.

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T. Ghani et al., “A 90 nm High Volume Manufacturing Logic Technology Featuring Novel 45 nm Gate Length Strained Silicon CMOS Transistors”, Portland Technology Development, TCAD, #QRE, Intel Corp., 3 pages.

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