Method of making semiconductor device

Details Method of making semiconductor device Method of making semiconductor device

2002-11-12

2004-02-10

Thompson, Craig A. (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

Reexamination Certificate

active

06689639

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a method of making a semiconductor device such as a semiconductor chip provided with bump electrodes.
BACKGROUND ART
Recently, there is an increasing demand for mounting electronic components on a printed circuit board or on a ceramic board at high densities. As a method which meets such a demand, much attention is focused on bear chip mounting of semiconductor chips. In bear chip mounting, face-down mounting or flip-chip bonding is increasingly used instead of conventional face-up mounting. In the face-up mounting, wire-bonding is utilized to provide electrical connection between a semiconductor chip and a wiring pattern on a board. In the face-down mounting and the flip-chip bonding, a semiconductor chip having bump electrodes is mounted on a wiring board while providing connection between the bump electrodes and electrodes on the wiring board.
FIGS. 11
a
-
13
c
illustrate an example of prior art method for making a semiconductor chip or semiconductor device having bump electrodes.
Firstly, in the prior art method, on a semiconductor substrate
60
as shown in
FIG. 11
a,
a conductor film
63
for electroplating is formed, as shown in
FIG. 11
b.
The semiconductor substrate
60
is, in advance, formed with a plurality of electrode portions
61
arranged at a predetermined pitch and a protective film
62
for protecting the obverse surface of the substrate. The electrode portions
61
comprise part of an Al wiring pattern or a Cu wiring pattern formed on the obverse surface of semiconductor substrate
60
. The protective film
62
includes openings
62
a
at locations corresponding to the electrode portions
61
. The conductor film
63
is formed by applying Ti, Ni or Cu by sputtering or vapor deposition to cover the surfaces of the electrode portions
61
and the protective film
62
.
Subsequently, as shown in
FIG. 11
c,
a resin film
64
is formed on the semiconductor substrate
60
. Specifically, a photosensitive liquid resin composite is applied to the semiconductor substrate
60
by spin-coating.
Then, as shown in
FIG. 12
a,
openings
64
a
are formed in the resin film
64
. Specifically, the openings
64
a
are formed in the resin film
64
at locations corresponding to the electrode portions
61
by a light-exposure process using a predetermined mask (not shown) and the subsequent developing process.
Subsequently, as shown in
FIG. 12
b,
barrier metal layers
65
are formed at the openings
62
a
and the openings
64
a
by electroplating. The barrier metal layers
65
are provided to prevent the wiring material of the electrode portions
61
from diffusing toward solder bumps which will be described later and to prevent the solder component of the solder bumps from diffusing toward the electrode portions
61
. Instead of the electroplating, the barrier metal layers may be formed by electroless plating, as disclosed in JP-A-6-140409, for example.
Then, as shown in
FIG. 12
c,
solder plating
66
as a bump material is deposited at each of the openings
64
a
by electroplating.
Subsequently, as shown in
FIG. 13
a,
the protective film
64
is removed by using a predetermined stripping agent. Then, as shown in
FIG. 13
b,
the exposed portions of the conductor film
63
are etched away. Then, as shown in
FIG. 13
c,
the solder plating
66
is heated for temporary melting, thereby providing solder bumps
66
′.
In the above-described prior art method, the solder plating
66
, which is the bump material, is applied to the openings
64
a
of the resin film
64
by electroplating. As shown in
FIG. 12
c,
the solder plating
66
deposited by electroplating partially rides on the resin film
64
, thereby having an overhung configuration. Thus, the solder plating
66
includes overhung portions
66
a
riding on the resin film
64
. Therefore, in the process step described with reference to
FIG. 13
a,
the overhung portions
66
a
may hinder the proper removal of the resin film
64
. Specifically, since part of the resin film
64
is sandwiched between the overhung portions
66
a
and the conductor film
63
formed on the semiconductor chip
60
, the removal of the resin film
64
often becomes insufficient. When the resin film
64
remains, it hinders the etching for removal of the conductor film
63
described with reference to
FIG. 13
b
and the formation of the solder bumps
66
described with reference to
FIG. 13
c.
When the formation of the solder bumps
66
′ is hindered, the height uniformity of the solder bumps
66
′ tends to be deteriorated.
Instead of the above-described electroplating which utilizes the resin film
64
having openings
64
a
as a mask, the solder bumps
66
′ may be formed by a metal mask printing method. First, in the metal mask printing method, a metal mask, which is formed with a plurality of openings in advance, is prepared. The openings are provided at locations corresponding to the electrode portions of the semiconductor chip. A barrier metal layer is formed at each of the electrode portions in advance by photolithography for example. Then, the metal mask is disposed on the semiconductor chip while positioning the openings of the metal mask correspondingly to the electrode portions of the semiconductor chip. Subsequently, solder paste containing solder powder is applied to the openings of the metal mask by a printing method. Then, after the metal mask is removed from the surface of the semiconductor chip, the solder powder in the solder paste is temporarily melted by heating. As a result, generally spherical solder bumps are formed on the electrode portions of the semiconductor chip. This technology is disclosed in JP-A-11-340270 for example.
However, in the metal mask printing method, when the metal mask is to be disposed on the semiconductor chip, the openings need be positioned correspondingly to the electrode portions. Such positioning becomes more difficult as the arrangement pitch of the electrode portions becomes smaller. Particularly when the arrangement pitch is no more than 200 &mgr;m, the positional deviation in disposing the metal mask becomes significantly large. The positional deviation of the metal mask affects the position of the bump formation, which may lead to a conduction failure when the semiconductor chip is flip-chip bonded to a wiring board.
Moreover, in the metal mask printing method, the metal mask need be removed from the semiconductor chip before heating the solder paste. At that time, part of the solder paste is often removed together with the metal mask. Particularly, the smaller the diameter of the electrodes and hence of the openings of the metal mask is, the larger the proportion of the removed amount of the solder paste in the entire solder paste is. Such partial removal of the solder paste makes it difficult to form solder bumps having a proper size, which problem becomes more serious as the diameter of the electrodes decreases for providing a minute wiring pattern.
Further, in the metal mask printing method, the solder paste is subjected to the heating treatment after the metal mask is removed from the semiconductor chip. Therefore, the solder paste on the electrodes is likely to flow during the heating due to the decrease of the viscosity. As a result, one deposit of the solder paste may join with an adjacent deposit of the solder paste. In such a case, short-circuiting occurs between the adjacent solder bumps. Such a problem is more likely to occur, as the arrangement pitch of the electrodes becomes smaller.
In this way, with the metal mask printing method, it is difficult to form bumps highly accurately on a semiconductor chip provided with electrodes arranged at a minute pitch.
In the technique disclosed in JP-A-11-340270 described above, instead of a metal mask, a polyimide mask is used for defining openings for applying the solder paste. However, as described in JP-A-11-340270, the polyimide mask is not removed from the semiconductor chip. When the polyimide mask remains around the solder bumps on the semiconductor chip

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