Method of making non-volatile semiconductor memory devices havin

Details Method of making non-volatile semiconductor memory devices havin Method of making non-volatile semiconductor memory devices havin

1997-02-07

1999-01-26

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438981, H01L 218247

Patent

active

058638229

ABSTRACT:
Disclosed herein is a stacked gate type non-volatile semiconductor memory cell including source/drain regions having a first portion covered with a tunnel oxide film and a second portion covered with an insulator film. The memory cell further includes a gate insulating film formed on a channel region, wherein the tunnel insulating film is thinner than the gate oxide film and the insulator film is thicker than the gate insulating film. A floating gate is formed on the respective insulating films and a control gate is formed over the floating gate with an intervention of a second gate insulating film.

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patent: 5106772 (1992-04-01), Lai
patent: 5352619 (1994-10-01), Hong
patent: 5379253 (1995-01-01), Bergemont
patent: 5427970 (1995-06-01), Hsue et al.
patent: 5521109 (1996-05-01), Hsue et al.
"A High Capacitive-Coupling Ratio (HiCR) Cell for 3V-only 64 MBIT and Future Flash Memories", Y. S. Hisamune et al., IEDM 1993, pp. 19-22.
"A Novel Sublithographic Tunnel Diode Based 5V-only Flash Memory", M. Gill et al., IEDM 1990, pp. 119-122.

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