Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Having enclosed cavity
Reexamination Certificate
2006-06-14
2010-10-05
Zarneke, David A (Department: 2891)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Having enclosed cavity
C438S459000
Reexamination Certificate
active
07807550
ABSTRACT:
A wafer level package for a MEMS device is made by bonding a MEMS wafer and a lid wafer together to form a hermetically sealed cavity. One or more vias filled with conductive or semiconductive material is etched one of the wafers to form one or more rods extending through the wafer. The rods provide electrical connection to components within the hermetically sealed cavity.
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“High Density, High Aspect Ratio Through-Wafer Electrical Interconnect Vias for MEMS Packaging”, Seong Joon Ok, et al, IEEE Transactions on Advanced Packaging, Piscataway, NJ, USA, vol. 26, No. 3, Aug. 1, 2003, pp. 302-309, XP011102265, ISSN: 1521-3323.
Chowdhury Mamur
Ouellet Luc
(Marks & Clerk)
DALSA Semiconductor Inc.
Mitchell Richard J.
Zarneke David A
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