Method of making IC capacitor

Details Method of making IC capacitor Method of making IC capacitor

2002-10-01

2004-01-13

Wiczewski, Mary (Department: 2822)

Semiconductor device manufacturing: process

Making passive device

C438S239000, C438S250000, C438S253000, C438S393000, C438S396000, C438S952000

Reexamination Certificate

active

06677216

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to semiconductor manufacturing processes and, more particularly, to a method of making an IC capacitor.
In the traditional IC (integrated circuit) capacitor fabrication process of semiconductor manufacture, particularly the fabrication process of the digital mixing IC capacitor and the LCD driving IC capacitor, a bottom anti-reflection layer (BARC) is usually coated on the bottom electrode of the capacitor. The anti-reflection layer can prevent the occurrence of standing waves effect during photolithography, thus maintaining the profile of the bottom electrode of the capacitor.
Additionally, in order to enhance the conductivity, “polycide” is commonly used as the material of the bottom electrode of the capacitor. When an amorphous silicon (&agr;-Si) layer serves as the anti-reflection layer in the fabrication process of the capacitor, the amorphous silicon layer reduces the conductivity of the bottom electrode, which affects the stability and reliability of the capacitor.
Lur et al. (U.S. Pat. No. 5,580,701) disclose that a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer or an amorphous silicon layer serves as the anti-reflection layer to eliminate standing waves in the photoresist layer of VLSI devices. The disclosed method, however, does not teach how to solve the conductivity problem mentioned previously.
BRIEF SUMMARY OF THE INVENTION
Embodiments of the present invention relate to a method of making an IC capacitor. In specific embodiments, the method improves the stability of the IC capacitor. The method can also improve the conductivity of the bottom electrode of the IC capacitor.
In accordance with an aspect of the present invention, a method of making an IC capacitor comprises providing a substrate, forming a polycide layer on the substrate, and forming an insulating amorphous silicon layer on the polycide layer. The insulating amorphous silicon layer serves as an anti-reflection layer. The method further comprises implanting n-type ions into the insulating amorphous silicon layer to transform the insulating amorphous silicon layer into a conductive amorphous silicon layer, and patterning the polycide layer and the conductive amorphous silicon layer to form a bottom electrode on the substrate. A dielectric layer is formed on the bottom electrode and the substrate, and a conductor layer is formed on the dielectric layer. The conductor layer is patterned to form a top electrode on the dielectric layer.
In some embodiments, the polycide layer comprises doped polysilicon and tungsten silicon (WSi
x
). The insulating amorphous silicon layer is formed by deposition. The n-type ions comprise As
+
. The n-type ions are implanted with about 10-20 keV of energy and more than about 1E14 atom/cm
2
of dosage. The dielectric layer comprises a silicon oxide layer formed by deposition.
In accordance with another aspect of the invention, a method of making an IC capacitor comprises providing a substrate, forming a doped polysilicon layer on the substrate, forming a silicide layer on the doped polysilicon layer, and forming a conductive amorphous silicon layer serving as an anti-reflection layer on the silicide layer. A bottom electrode comprises the doped polysilicon layer, the silicide layer and the conductive amorphous silicon layer. The method further comprises forming a dielectric layer on the bottom electrode, and forming a top electrode on the dielectric layer.
In some embodiments, the conductive amorphous silicon layer is formed by CVD from SiH
4
gas and PH
3
gas. The SiH
4
gas and PH
3
gas are in-situ introduced at a flow rate of about 190 sccm for the SiH
4
gas and a flow rate of about 25 sccm for the PH
3
gas. The CVD is performed at a temperature of about 550±15° C., and at a pressure of about 0.3±0.1 torr. The conductive amorphous silicon layer has a thickness of about 100-300 angstroms. The doped polysilicon layer has a sheet resistance of about 30-100 &OHgr;/□,and the silicide has a sheet resistance of about 0.1-1 &OHgr;/□. The conductive amorphous silicon layer has a sheet resistance of about 30-100 &OHgr;/□. A polycide layer is composed of the doped polysilicon layer and the silicide layer. The variation in sheet resistance between the conductive amorphous silicon layer and the polycide layer is within about 30 &OHgr;/□.
According to specific embodiments of the present invention, the IC capacitor has a conductive amorphous silicon layer which serves as an anti-reflection layer. The invention can improve the stability of the IC capacitor, thereby raising reliability and yield, and ameliorating the disadvantages of the prior art.


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