Method of making floating gate based memory device

Details Method of making floating gate based memory device Method of making floating gate based memory device

1997-09-15

1999-06-22

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438286, 438304, 257322, H01L 218247

Patent

active

059151765

ABSTRACT:
Semiconductor memory device and method is provided for a stacked gate type flash semiconductor memory device. The semiconductor memory device improves programming and erasing operation efficiency. A gate oxide layer and a floating gate are formed to be stacked on a substrate. A first dielectric layer and a control gate are formed to be stacked on the floating gate. A second dielectric layer is formed on both sides of the floating gate and first and second semiconductor sidewalls are formed on the second dielectric layer on the both sides of the floating gate. Impurity regions are formed in the substrate at the both sides of the floating gate and a wire layer is formed to contact with the semiconductor sidewalls and each of the impurity regions.

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"A Flash-Erase Eeprom Cell With An Asymmetric Source and Drain Structure", H. Kume et al., Central Research Laboratory, IEDM 87, pp. 560-563, 1987.

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