Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-21
1999-10-19
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438462, 438973, H01L 21336
Patent
active
059703300
ABSTRACT:
A method of increasing the performance of an FET device by aligning the channel of the FET with the [110] crystal direction of a {100} silicon wafer. The {100} silicon wafer and the image of a lithographic mask are rotated 45.degree. relative to each other so that, instead of the channel being aligned parallel with the [100] crystal direction in the conventional fabrication, the channel is aligned approximately parallel with the [110] crystal direction. The mobility of the carriers is higher in the [110] crystal direction thereby increasing the performance of the FET with only a minor modification in the lithographic process. The novel FET results with its channel aligned approximately parallel with the [110] crystal direction.
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Advanced Micro Services, Inc.
Chaudhari Chandra
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