Method of making discrete trap memory (DTM) mediated by...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S315000, C257S410000, C257SE51001, C257SE51002, C257SE51003, C257SE51004, C257SE51005, C257SE51006, C257SE29170, C257SE21050, C257SE21520, C977S773000, C977S763000, C438S257000, C438S260000, C438S261000, C438S287000, C438S288000

Reexamination Certificate

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07847325

ABSTRACT:
A discrete trap memory, comprising a silicon substrate layer, a bottom oxide layer on the silicon substrate layer, a Fullerene layer on the bottom oxide layer, a top oxide layer on the Fullerene layer, and a gate layer on the top oxide layer; wherein the Fullerene layer comprises spherical, elliptical or endohedral Fullerenes that act as charge traps.

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