Method of making combined JFET & MOS transistor device

Details Method of making combined JFET & MOS transistor device Method of making combined JFET & MOS transistor device

1996-03-06

1997-05-20

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having junction gate

438304, H01L 21265

Patent

active

056311761

ABSTRACT:
A transistor circuit is formed on a substrate having source and drain electrodes and multiple current-controlling gates. The two current-controlling gates are separated by spacer oxide material. The first gate is an metal oxide semiconductor (MOS) gate that is insulated from the substrate by a layer of gate oxide. The second gate is a junction field effect transistor (JFET) gate contiguous to the MOS gate that is insulated from the MOS gate by a layer of spacer oxide.

REFERENCES:
patent: 5256586 (1993-10-01), Choi et al.
patent: 5296409 (1994-03-01), Merrill et al.
patent: 5418392 (1995-05-01), Tanabe
patent: 5422288 (1995-06-01), Neilson et al.
patent: 5543643 (1996-08-01), Kapoor

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