Method of making capacitor and conductive line constructions

Details Method of making capacitor and conductive line constructions Method of making capacitor and conductive line constructions

1996-01-18

1998-06-30

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438396, 438254, 438397, H01L 218242

Patent

active

057733414

ABSTRACT:
A semiconductor processing method of forming a capacitor construction includes, a) providing a pair of electrically conductive lines having respective electrically insulated outermost surfaces; b) providing a pair of sidewall spacers laterally outward of each of the pair of conductive lines; c) etching material over the pair of conductive lines between the respective pairs of sidewall spacers selectively relative to the sidewall spacers to form respective recesses over the pair of conductive lines relative to the sidewall spacers, the etching leaving the outermost conductive line surfaces electrically insulated; d) providing a node to which electrical connection to a capacitor is to be made between the pair of conductive lines, one sidewall spacer of each pair of sidewall spacers being closer to the node than the other sidewall spacer of each pair; e) providing an electrically conductive first capacitor plate layer over the node, the one sidewall spacer of each of sidewall spacers, and within the respective recesses; and f) providing a capacitor dielectric layer and a second capacitor plate layer over the first capacitor plate layer.

REFERENCES:
patent: 5061650 (1991-10-01), Dennison et al.
patent: 5292677 (1994-03-01), Dennison
patent: 5318925 (1994-06-01), Kim
patent: 5338700 (1994-08-01), Dennison et al.
patent: 5474951 (1995-12-01), Han et al.
patent: 5492850 (1996-02-01), Ryou
patent: 5563089 (1996-10-01), Jost et al.
patent: 5583069 (1996-12-01), Ahn et al.
patent: 5604147 (1997-02-01), Fischer et al.

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