Method of making asymmetric nonvolatile memory cell

Details Method of making asymmetric nonvolatile memory cell Method of making asymmetric nonvolatile memory cell

1996-09-11

1999-07-06

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438286, 438302, H01L 218247

Patent

active

059207760

ABSTRACT:
A nonvolatile memory having a cell comprising an N.sup.+ type source region and drain region embedded in a P.sup.- type substrate and surrounded by respective P-pockets. The drain and source P-pockets are formed in two different high-angle boron implantation steps designed to optimize implantation energy and dosage for ensuring scalability of the cell and avoiding impairment of the snap-back voltage. The resulting cell also presents a higher breakdown voltage as compared with known cells.

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