Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
2005-08-16
2005-08-16
Abraham, Fetsum (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S193000, C438S195000, C438S284000
Reexamination Certificate
active
06929988
ABSTRACT:
The cellular structure of the power device includes a substrate that has a highly doped drain region. Over the substrate there is a more lightly doped epitaxial layer of the same doping. Above the epitaxial layer is a well region formed of an opposite type doping. Covering the wells is an upper source layer of the first conductivity type that is heavily doped. The trench structure includes a sidewall oxide or other suitable insulating material that covers the sidewalls of the trench. The bottom of the trench is filled with a doped polysilicon shield. An interlevel dielectric such as silicon nitride covers the shield. The gate region is formed by another layer of doped polysilicon. A second interlevel dielectric, typically borophosphosilicate glass (BPSG) covers the gate. In operation, current flows vertically between the source and the drain through a channel in the well when a suitable voltage is applied to the gate.
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Abraham Fetsum
Fairchild Semiconductor Corporation
Thomas R. FitzGerald, Esq.
LandOfFree
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