Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Patent
1994-09-06
1999-03-09
Niebling, John F.
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
438601, 257529, 148DIG55, H01L 2182
Patent
active
058799664
ABSTRACT:
An improved structure and method of forming a protective layer over an opening in insulation layers over a fuse is presented. The protective layer prevents contaminates from entering the exposed insulation layers in a fuse opening while not interfering with the laser trimming of the fuse. An opening through the layers over a fuse is made forming vertical sidewalls which expose portions of the insulation layers. A protective layer is formed over the insulation layer, the sidewalls and fuse thus preventing contaminates from diffusing into the exposed insulation layers. A second opening is made in the protective layer over the fuse link to allow a laser beam to melt the underlying fuse link.
REFERENCES:
patent: 4536949 (1985-08-01), Takayama et al.
patent: 4628590 (1986-12-01), Udo et al.
patent: 5025300 (1991-06-01), Billig et al.
patent: 5241212 (1993-08-01), Montonami et al.
Chin Hsien Wei
Lee Jin-Yuan
Yoo Chue-San
Ackerman Stephen B.
Gurley Lynne A.
Niebling John F.
Saile George O.
Stoffel William J.
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