Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-03-21
1997-08-26
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438230, 438286, 438303, 438592, 438595, H01L 21265
Patent
active
056610483
ABSTRACT:
An insulated gate field effect transistor (10) having a reduced gate to drain capacitance and a method of manufacturing the field effect transistor (10). A dopant well (13) is formed in a semiconductor substrate (11) and a drain extension region (25) is formed in the dopant well (13). An oxide layer (26) is formed on the dopant well (13) wherein the oxide layer (26) has a thickness of at least 400 angstroms. A gate structure (61) having a gate shunt portion (32) over a thinned portion of the oxide (26) and a gate extension portion (58) over an unthinned portion of the oxide (26). The thinned portion of the oxide (26) forms a gate oxide of the field effect transistor (10) and the unthinned portion lowers a capacitance of the gate shunt portion (32) of the field effect transistor (10).
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Baker Frank K.
Davies Robert B.
Sudhama Chandrasekhara
Bowers Jr. Charles L.
Dover Rennie William
Gurley Lynne A.
Motorola Inc.
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