Method of making an efficient NPN turn-on in a high voltage DENM

Details Method of making an efficient NPN turn-on in a high voltage DENM Method of making an efficient NPN turn-on in a high voltage DENM

1997-05-08

2000-06-06

Dutton, Brian

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438236, H01L 218238

Patent

active

060717688

ABSTRACT:
A high voltage DENMOS transistor (10) having improved ESD protection. The transistor (10) is optimized to provide maximum substrate current in order to turn on the inherent lateral npn transistor during an ESD event so that the lateral npn can dissipate the ESD event without damage to the transistor (10). This is accomplished by optimizing the overlap (A) of the drain extended region (16) and the gate electrode (28) to control the gate coupling to achieve maximum substrate current.

REFERENCES:
patent: 5019888 (1991-05-01), Scott et al.
patent: 5173755 (1992-12-01), Co et al.
patent: 5486716 (1996-01-01), Saito et al.
patent: 5493142 (1996-02-01), Randazzo et al.
patent: 5646808 (1997-07-01), Nakayama
patent: 5872376 (1999-02-01), Gardner et al.
1995 International Electron Devices Meeting, Washington, DC, Dec. 1995 "Efficient NPN Operation in High Voltage NMOSFET for ESD Robustness" (C. Duvvury, D. Briggs, J. Rodriguez, F. Carvajal, A Young, D. Redwine and M. Smayling).

Affiliated with

Also associated with

Rating

Method of making an efficient NPN turn-on in a high voltage DENM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making an efficient NPN turn-on in a high voltage DENM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making an efficient NPN turn-on in a high voltage DENM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2212443