Method of making a transistor with a sloped drain diffusion...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S514000, C257SE29005

Reexamination Certificate

active

07629214

ABSTRACT:
Disclosed is that in a method of manufacturing a semiconductor device of the present invention, when first and second P type diffusion layers using as a backgate region, these layers are formed in such a way that their impurity concentration peaks are shifted, respectively. Then, in the backgate region, a concentration profile of a region where an N type diffusion layer is formed is gradually established. After that, impurity ions, which form the N type diffusion layer, are implanted, and thereafter a thermal treatment is performed to diffuse the N type diffusion layer in a y shape at a lower portion of a gate electrode. This manufacturing method makes it possible to implement an electric filed relaxation in a drain region.

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Office action dated Dec. 31, 2007 for U.S. Appl. No. 11/393,530.
Office action dated Jun. 26, 2008 for U.S. Appl. No. 11/393,530.
Office action dated Nov. 17, 2008 for U.S. Appl. No. 11/393,530.

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