Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-11-20
2001-03-27
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000, C438S622000, C438S643000, C438S688000
Reexamination Certificate
active
06207559
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention is directed to an electrical interconnection for attachment to a substrate. More specifically, the present invention is directed to an electrical interconnection between a contact area of a substrate and a contact area of a die and a method of forming the same.
2. Present State of the Art
Integrated circuits have for years been universally used in computer applications, as well as other high-tech applications such as communications and military technologies. A primary concern with integrated circuits has long been the electrical interconnection between the bond pad of a die and the bond pad of a semiconductive substrate. In the context of this document, the term “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including but not limited to bulk semiconductive material such as a semiconductive wafer, either alone or in assemblies comprising other materials thereon, and semiconductive material layers, either alone or in assemblies comprising other materials. The term “substrate” refers to any supporting structure including but not limited to the semiconductor substrates described above. In the context of this document, the term “die” is defined as a chip or other electronic component part, either passive or active, discrete or integrated.
Bond pads have typically been used to provide electrically conductive metal contact areas on semiconductor substrates in integrated circuits. Bond pads used in integrated circuits have historically been composed of an aluminum-copper alloy, wherein the copper typically comprises less than about 0.5% of the alloy. Aluminum is an excellent metal for bond pad formation due to its superior adhesion qualities, high thermal stability, and ease of workability (i.e., in etching processes). Although aluminum bond pads are the semiconductor industry standard, aluminum readily oxidizes, even at room temperature, to form aluminum oxide (Al
2
O
3
). Oxides of conductive metals, whether it be aluminum, copper or other conductive metals, sharply increase the contact resistance of the metal and decrease the electrical connection and the efficiency of the bond pad. Hence, while aluminum bond pads exhibit excellent electrical conductivity, unprotected aluminum bond pads readily react to form aluminum oxide which exhibits very high contact resistance and results in a poor interconnection between the bond pad of a die and the bond pad of a substrate.
Several processes have been proposed for removing aluminum oxide from aluminum bond pads in electrical interconnect formation. For instance, it is known to clean aluminum oxide off of aluminum bond pads by sputter-etching in a vacuum tight sputtering chamber and then sputtering a barrier metal, such as TiW, TiN and NiCr, onto the clean aluminum bond pad. A noble metal, such as gold, is then sputtered onto the barrier metal to provide an inert, oxide free surface. While this metallization scheme successfully removes the oxide formed on the aluminum bond pad, this process unfortunately requires the semiconductor die pads and bond pads to be extensively handled. Extensive handling often results in contamination of, and damage to, the electrical connection. Furthermore, the gold plating of the semiconductor die pad is an elaborate process that is difficult, expensive and time consuming.
Another process commonly referred to as the “zincate process” activates the aluminum bond pads using a “zincate solution” and then deposits a layer of nickel and a layer of gold on the bond pad to preserve the electrical connection. The zincate solution, consisting of zinc oxide and sodium hydroxide, dissolves an aluminum oxide formed on the aluminum bond pad to clean the same, and also deposits a thin layer of zinc over the clean aluminum bond pad. A thin nickel phosphorous barrier layer is then deposited over the zinc. A layer of gold is added to the surface of the nickel phosphorous layer to provide an oxide free surface. Although the zincate process effectively reduces the contact resistance stemming from oxide formation, the zincate process is considered to be too expensive for typical mass production processes.
In view of the drawbacks of the presently used electrical interconnection between the bond pad of a chip and the bond pad of a substrate, it is readily apparent that there exists a need for an affordable, reliable, highly conductive electrical interconnection for attachment to a substrate and an affordable method for forming an electrical interconnection for attachment to a substrate.
SUMMARY OF THE INVENTION
In accordance with the invention as embodied and broadly described herein, there is provided an electrical interconnection for attachment to a substrate and a method for forming an electrical interconnection to a substrate. The electrical interconnection in the present invention comprises a first metal layer, a first diffusion barrier layer on the first metal layer, a second metal layer on the first diffusion barrier layer, an organometallic layer on the second metal layer, and an electrical interconnect layer on the organometallic layer.
Once the oxide formed on the first metal layer is removed, a first diffusion barrier layer is formed on the first metal layer. The first diffusion barrier layer prevents diffusion of the first metal layer and the second metal layer therethrough. In a preferred embodiment, the first metal layer is composed of aluminum and the second metal layer is composed of copper. The first diffusion barrier layer prevents the aluminum and the copper from diffusing and adversely effecting the electrical interconnection.
The organometallic layer is preferably formed by contacting the second metal layer with an organic material to form an organometallic layer. The organometallic layer formed is preferably a copper azole such as Cu
+
(azole
−
) and Cu
++
(azole
−
)
2
). The organometallic layer prevents oxidation of the second metal layer which is preferably copper.
The electrical interconnection device of the present invention may be combined with an additional substrate to form an electrical interconnection between a first substrate and a second substrate, for example, as in an integrated circuit. The electrical interconnect of the present invention has a low contact resistance and creates a good electrical interconnect to bond a die to another substrate, such as a supporting substrate.
REFERENCES:
patent: 3106489 (1963-10-01), Lepster
patent: 4598022 (1986-07-01), Haque et al.
patent: 5583073 (1996-12-01), Lin et al.
patent: 5629564 (1997-05-01), Nye, III et al.
patent: 5656858 (1997-08-01), Kondo et al.
patent: 5708302 (1998-01-01), Azuma et al.
patent: 5844318 (1998-12-01), Sandhu et al.
patent: 5960251 (1999-09-01), Brusic et al.
patent: 5963835 (1999-10-01), Sandhu et al.
patent: 1-145856 (1989-06-01), None
patent: 2-235372 (1990-09-01), None
patent: 4-27163 (1992-01-01), None
patent: 5-74959 (1993-03-01), None
patent: 6-5599 (1994-01-01), None
patent: 086001640 (1986-03-01), None
Guerrero Maria
Jr. Carl Whitehead
Micron Technology Inc
Workman & Nydegger & Seeley
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