Method of making a semiconductor component with compensation imp

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438264, H01L 218247

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active

059813423

ABSTRACT:
A semiconductor component, in particular an EEPROM, and a production method therefor, avoid an avalanche breakdown from a buried channel to a substrate through the use of a special lateral dopant profile in the buried channel, in which a peripheral zone of the buried channel has a higher effective doping than a region located below a tunnel window. The lateral dopant profile is produced through the use of a compensation implantation with dopant atoms of the conduction type opposite that of the buried channel.

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Adan, A.O. et al., A scaled .6/spl mu/m high speed PLD technology using single-poly EEPROM's, Custom Integrated Circuits Conference, Proceeding of the IEEE, pp. 55-58, 1995.
Feldmann, U. et al., Concurrent technology, device, and circuit development for EEPROMs, Design Automation Conference, Proceedings of the ASP-DAC '98. Asia and South Pacific, pp. 123-128, 1998.
Kakoschke, R. et al., Concurrent technoloty, device, and circuit development for EEPROMs, Simulation of Semiconductor Processes and Devices, SISPAD '97., International Conference on, pp. 193-196, 1997.

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