Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-06
1999-09-07
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438304, 438305, 438306, 438307, 438585, 438586, H01L 21336
Patent
active
059500913
ABSTRACT:
A gate conductor structure and method for forming the structure are provided whereby the overall gate length can be made with less susceptibility to lithography variations. The gate conductor is produced by defining a sidewall surface region and then forming the gate conductor material on that sidewall surface a closely controlled, defined lateral distance therefrom. The gate conductor length is therefore dependent primarily upon deposition technology rather than both deposition and lithography. Deposition can be controlled at the defined sidewall surface more closely than mask alignment, thin film development and etching processes of conventional designs. The gate conductor is formed from the sidewall surface such that the sidewall surface demonstrates a greater likelihood of forming a thicker sidewall spacer on one surface of the gate conductor than the opposing gate conductor surface. Accordingly, the gate conductor demonstrates asymmetrical sidewall spacer formation and the benefits of a drain area formed a greater distance from the channel than a source area.
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Fulford Jr. H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Gurly Lynne A.
Niebling John F.
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