Method of making a pn-junction in a semiconductor element

Details Method of making a pn-junction in a semiconductor element Method of making a pn-junction in a semiconductor element

2000-10-17

2002-04-23

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S299000

Reexamination Certificate

active

06376321

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention concerns a method of making a pn-junction in a semiconductor element.
Semiconductor elements have numerous pn-junctions. Apart from anything else, such pn-junctions have found a multitude of applications as photosensors.
Various types of photosensors are used for the monitoring of burners. Over the last twenty years, conventional yellow light burners have been increasingly replaced by blue light burners. The ultraviolet spectral range is best suited for optical detection of the presence or absence of the flame as the infrared radiation coming from the burner itself must not lead to display of a “flame present” signal. A silicon-based semiconductor diode which is suitable for the monitoring of blue light burners is known from the U.S. Pat. No. 4,910,570. With certain types of burners however, the light given out by the flame is too small to be detected by this semiconductor diode. Therefore, photoelectric multipliers or gaseous discharge tubes are still used for these burners. These photosensors are large, expensive, sensitive to magnetic fields, can be easily damaged and require high voltage for operation.
To a large extent, electronic cameras use image sensors which are based on the CCD (charge-coupled device) technology. In the low-cost range, image sensors based on the CMOS technology with which each pixel contains a photodiode, a pre-amplifier and read-out electronics are increasingly used. Such CMOS image sensors are indeed cheaper, but less sensitive than CCD image sensors.
From the articles “CMOS compatible avalanche photodiode”, Proceedings of the SPIE, 3410 (1998), pages 10-20, herein incorporated by reference, and “Avalanche photodiode array in BiCMOS technology” Proceedings of the SPIE, 3649 (1999) pages 40-49 from A. Biber and P. Seitz, herein incorporated by reference, avalanche photodiodes are known which can be produced on the same chip as the electronics. According to the dissertation from W. J. Kindt with the title “Geiger mode avalanche photodiode arrays for spatially resolved single photon counting”, Delft University Press, 1999, Chapters 3 to 6, herein incorporated by reference, such avalanche photodiodes can be operated in Geiger mode and enable the detection of single photons. According to the dissertation from A. Biber with the title “Avalanche Photodiode Image Sensing in Standard Silicon BiCMOS Technology”, Diss ETH No. 13544, Chapter 5, herein incorporated by reference, they can also be used as image sensors. An avalanche photodiode which is sensitive to the ultraviolet spectral range is known from A. Pauchard's dissertation with the title “Silicon Sensor Microsystem for Ultraviolet Detection”, Hartung-Gorre Series in Microsystems Volume 7 (2000), Chapters 4 and 5, herein incorporated by reference. However, these known avalanche photodiodes require special process stages and, in addition, have too high leakage currents.
SUMMARY OF THE INVENTION
An object of the invention is to develop semiconductor photosensors with improved characteristics so that they are suitable for flame monitoring and/or for use in electronic cameras.
The description of the invention is based on the expressions commonly used in the production of semiconductor elements. Additionally, the description is restricted to the explanation of the fundamental characteristics of the invention.
FIG. 1
shows a cross-section of a diode realized with CMOS technology which is embedded in a p-doped substrate
1
. The diode consists of a p-doped well
2
which is completely located within an n-doped well
3
. According to the invention, it is understood that the breakdown voltage of the pn-junction formed between the two wells
2
and
3
is limited by breakdowns along the lateral edge
4
of the pn-junction. The reason for this is that the concentration of ions of the n-well
3
is greatest at these locations and that field enhancement (so-called peak effect) occurs at location
4
.
In accordance with the invention, it is now suggested to reduce the concentration of ions in the critical area of the pn-junction in that, on implantation for the formation of the n-well
3
, a mask is used which covers a part of the later n-well
3
, namely the part in which the edge of the p-well
2
comes to lie. Because the n-well
3
must be contacted ohmically, on implantation of the n-well
3
, two n-doped zones are first created whose distance is dimensioned so that, on subsequent diffusions, the two separate zones combine into one single well. In this way, the concentration of ions of the n-well
3
can be considerably reduced in the area of the lateral edge of the p-well
2
and the breakdown voltage of the pn-junction is therefore increased.
The invention also enables the production of MOS transistors with improved characteristics.
In the following, embodiments of the invention are described in detail based on the drawing.


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