Method of making a PMOSFET in a semiconductor device

Details Method of making a PMOSFET in a semiconductor device Method of making a PMOSFET in a semiconductor device

1997-10-08

1998-12-01

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438585, H01L 21336

Patent

active

058438122

ABSTRACT:
An improved p+ polysilicon gated PMOSFET having a channel on the surface of a silicon substrate and improved short channel behavior is disclosed. A simplified process allows making a p+ doped gate and source/drain regions at the same time, the transistor particularly having a stable threshold voltage. The disclosed method provides the steps of: (A) forming an active region and an insulation region on an n-type semiconductor substrate; growing a gate insulating layer on the silicon substrate; depositing a polysilicon layer on the gate insulating layer; annealing the polysilicon layer in the presence of NH.sub.3 or other nitrogen-containing gas; (C) forming a gate line by patterning and etching the polysilicon layer; and (D) implanting BF.sub.2 ions into the semiconductor substrate.

REFERENCES:
patent: 4577391 (1986-03-01), Hsia et al.
patent: 4621413 (1986-11-01), Lowe et al.
patent: 4897360 (1990-01-01), Guckel et al.
patent: 5567638 (1996-10-01), Lin et al.

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