Method of making a MOS-gated semiconductor device with a single

Details Method of making a MOS-gated semiconductor device with a single Method of making a MOS-gated semiconductor device with a single

1997-06-30

2000-06-27

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438527, 438530, 438547, 148DIG126, H01L 21425, H01L 2122, H01L 2138

Patent

active

060806141

ABSTRACT:
A method of fabricating a MOS-gated semiconductor device in which arsenic dopant is implanted through a mask to form a first layer, boron dopant is implanted through the mask to form a second layer deeper than the first layer, and in which a single diffusion step diffuses the implanted arsenic and the implanted boron at the same time to form a P+ body region with an N+ source region therein and a P type channel region.

REFERENCES:
patent: 5187117 (1993-02-01), Zommer
patent: 5559045 (1996-09-01), Yamamoto
patent: 5605851 (1997-02-01), Palmieri et al.
patent: 5698458 (1997-12-01), Hsue et al.
patent: 5750429 (1998-05-01), Kushida
patent: 5817546 (1998-10-01), Ferla et al.

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