Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-09-01
1999-12-14
Thomas, Tom
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
437195, H01L 2182
Patent
active
060016930
ABSTRACT:
The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the bottom electrode, a first barrier metal layer disposed in the antifuse cell opening to protect the antifuse material layer from diffusion from the bottom electrode and to form an effective bottom electrode of reduced area, hence reducing the capacitance of the device, an antifuse material layer disposed in the antifuse cell opening and over the first barrier metal layer, a second barrier metal layer disposed over the antifuse material layer, and a top electrode disposed over the second barrier metal layer.
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Chen Shih-Oh
Fang Leuh
Kruger James B.
Poon Elaine K.
Yeouchung Yen
Owens Douglas W.
Thomas Tom
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