Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-22
2008-04-22
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21625
Reexamination Certificate
active
11166138
ABSTRACT:
A patterned polysilicon gate is over a metal layer that is over a gate dielectric layer, which in turn is over a semiconductor substrate. A thin layer of material is conformally deposited over the polysilicon gate and the exposed metal layer and then etched back to form a sidewall spacer on the polysilicon gate and to re-expose the previously exposed portion of the metal layer. The re-exposed metal layer is etched using an etchant that is selective to the gate dielectric material and the sidewall spacer. Even though this etch is substantially anisotropic, it has an isotropic component that would etch the sidewall of the polysilicon gate but for the protection provided by the sidewall spacer. After the re-exposed metal has been removed, a transistor is formed in which the metal layer sets the work function of the gate of the transistor.
REFERENCES:
patent: 6268253 (2001-07-01), Yu
patent: 6686248 (2004-02-01), Yu
patent: 6717226 (2004-04-01), Hegde et al.
Goolsby Brian J.
White Bruce E.
Chaudhari Chandra
Clingan, Jr. James L.
Freescale Semiconductor Inc.
Simpson Cindy R.
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