Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-16
2007-10-16
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S199000, C438S230000, C438S202000, C438S258000, C438S303000, C438S207000, C438S218000, C257SE21630, C257SE21631, C257SE21632, C257SE21633, C257SE21634, C257SE21635, C257SE21636, C257SE21637, C257SE21638, C257SE21639, C257SE21640, C257SE21641, C257SE21642, C257SE21643, C257SE21644
Reexamination Certificate
active
11093801
ABSTRACT:
According to the embodiments to the present disclosure, the process of making a dual strained channel semiconductor device includes integrating strained Si and compressed SiGe with trench isolation for achieving a simultaneous NMOS and PMOS performance enhancement. As described herein, the integration of NMOS and PMOS can be implemented in several ways to achieve NMOS and PMOS channels compatible with shallow trench isolation.
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Barr Alexander L.
Jovanovic Dejan
Nguyen Bich-Yen
Sadaka Mariam G.
Thean Voon-Yew
Balconi-Lamica Micahel J.
Dolezal David G.
Freescale Semiconductor Inc.
Lindsay, Jr. Walter
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