Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
1999-05-18
2001-07-10
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S108000, C438S118000, C257S777000
Reexamination Certificate
active
06258625
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Aspects of the present invention are related to subject matter disclosed in co-pending applications entitled “Z-Axis Compressible Polymer With Fine Metal Matrix Suspension,” Ser. No. 09/315,373 filed on even date herewith and assigned to the assignee of the present invention, the subject matter of which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to electronic components which utilize a substantially lead-free interconnect process when forming an electronic module.
2. Description of Related Art
As the circuit density increases on integrated circuit devices such as silicon microprocessors, there is a need for high density interconnection between such a device and a chip carrier to which these devices are typically attached. Traditional methods of joining using solder ball arrays may become difficult with such dense circuitry.
Typically, solder ball arrays require fluxes when joining lead based solders. With connection densities reaching about 150 &mgr;m or below, it becomes difficult to clean such fluxes. Without effective flux cleaning, underfill materials which are used to enhance reliability of the resulting electronic module run the risk of delaminating. The use of lead based solder also increases the difficulties in disposing of any waste.
The circuit density also poses problems with shorting between adjacent solder balls particularly on chip carriers having camber or deformities. Typical chip carriers such as a ceramic substrate exhibit about 25 to about 50 &mgr;m camber as measured from a flat surface of the substrate. When a device with solder balls is joined to such a carrier, some of the solder balls contact the mating pads. Due to the wetting action of the solder the device is pulled down and remaining solder balls which make contact further pull down the chip. As a result, after joining, many of the solder balls are in closer proximity to each other and may be contacting each other leading to shorts.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of interconnecting high circuit density electronic components utilizing substantially lead-free interconnects which do not require flux and takes into account the deformities on a substrate surface.
It is another object of the present invention to provide an electronic module having high circuit density electronic components which utilizes substantially lead-free interconnects which do not require flux and takes into account the deformities on a substrate surface.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method of interconnecting electronic components comprising the steps of: (a) providing a first electronic component having electrical devices with corresponding bonding pads, the first electronic component having a patterned dielectric film formed thereon, the dielectric film having a plurality of protruding conductive studs, the studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices; (b) providing a second electronic component having a dielectric film formed thereon, the dielectric film adapted to offset camber on a surface of the second electronic component having a plurality of conductive vias corresponding to the studs on the first electronic component; (c) providing an interposer having electrical interconnections corresponding to the studs and vias; and (d) aligning and contacting the first electronic component and the second electronic component with the interposer disposed therebetween, such that the studs of the first electronic component and the vias of the second electronic component are adapted to be electrically and mechanically interconnected by the interposer.
Preferably, step (a) comprises providing a semiconductor chip having electrical devices with corresponding bonding pads, the chip having a patterned and cured polyimide film formed thereon, the polyimide film having a plurality of protruding conductive metal studs, the studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices.
Preferably, in step (a) the studs protruding about 15 &mgr;m to about 20 &mgr;m from a surface of the dielectric film and having of about 50 to about 75 &mgr;m and may comprise copper.
Preferably, step (b) comprises providing a substrate having a cured polyimide film formed thereon, the polyimide film having a plurality of copper vias substantially planar to a surface of the film and capped with gold, the vias corresponding to the studs on the first electronic component. Preferably, in step (b) the vias have a height of at least about 15 to about 30 &mgr;m and may protrude about
10
to about 15 &mgr;m from a surface of the dielectric film.
Preferably, step (b) comprises providing a substrate having a dielectric film formed thereon, the dielectric film adapted to offset camber on a surface of the substrate having a plurality of protruding conductive metal vias corresponding to the studs on the first electronic component.
Preferably, step (c) comprises providing a flexible interposer having electrical interconnections comprising conductive metal vias with palladium dendrites formed on a top exposed surface and a bottom exposed surface.
The present invention is directed to, in another aspect, an electronic module comprising a first electronic component having electrical devices with corresponding bonding pads, the first electronic component having a first dielectric film formed thereon, the film having a plurality of conductive studs corresponding to the bonding pads and adapted for electrical connection to the electrical devices; a second electronic component having a second dielectric film formed thereon, the film having a plurality of conductive vias corresponding to the studs on the first electronic component; an interposer disposed between the first and second electronic components having a plurality of interconnections corresponding to the studs of the first electronic component and the vias of the second electronic components. Preferably, the plurality of conductive studs protrude about 15 to about 20 &mgr;m from a surface of the first dielectric film with a diameter of about 50 to about 75 &mgr;m.
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patent: 5420520 (1995-05-01), Anschel et al.
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patent: 5611140 (1997-03-01), Kulesza et al.
Brofman Peter J.
Ray Sudipta K.
Stalter Kathleen A.
Blecker Ira D.
Bowers Charles
DeLio & Peterson LLC
International Business Machines - Corporation
Kehede Brook
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