Method of implantation

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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Details

C438S057000, C438S423000, C438S434000, C438S449000, C438S450000, C257SE21551

Reexamination Certificate

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07968424

ABSTRACT:
Provided is a method of implanting dopant ions to an integrated circuit. The method includes forming a first pixel and a second pixel in a substrate, forming an etch stop layer over the substrate, forming a hard mask layer over the etch stop layer, patterning the hard mask layer to include an opening between the first pixel and the second pixel, and implanting a plurality of dopants through the opening to form an isolation feature.

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patent: 5691233 (1997-11-01), Matsumoto
patent: 5786265 (1998-07-01), Hwang et al.
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patent: 2004/0253761 (2004-12-01), Rhodes et al.
patent: 2005/0139877 (2005-06-01), Rhodes et al.
patent: 2005/0218436 (2005-10-01), Yamaguchi et al.
patent: 2008/0057612 (2008-03-01), Doan et al.

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