Method of gate etching with thin gate oxide

Details Method of gate etching with thin gate oxide Method of gate etching with thin gate oxide

1998-04-27

2000-07-04

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438706, 438714, 156643, H01L 213205, H01L 214763

Patent

active

060838159

ABSTRACT:
A method for etching polysilicon or polycide gate electrodes over thin gate oxides is described wherein the problem of pitting and trenching of the silicon beneath the gate oxide, caused by penetration of the polysilicon etchant through the gate oxide is resolved. A cause of gate oxide penetration is found to be a native oxide formed on the exposed surface of polycide or polysilicon gate layer. The native oxide is uneven and has local thin spots which are penetrated by the traditional polysilicon etchants. The erratic penetration of the native oxide produces an uneven etch front which propagates down to the gate oxide. Gate oxides thinner than about 125 .ANG. are incapable of absorbing this irregularity during polysilicon over etch and are penetrated causing deep pockets in the subjacent silicon. The novel method first etches the native oxide with a brief highly selective fluorocarbon etch and then etches through the polycide or polysilicon with C.2 and HBr to endpoint on the thin gate oxide. A final brief over etch period using a highly selective polysilicon to completes removal of polysilicon patches with negligible gate oxide consumption. By this method gate oxides as thin as 30 .ANG. can successfully resist etchant penetration.

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