Method of forming via hole by dry etching

Details Method of forming via hole by dry etching Method of forming via hole by dry etching

2000-01-05

2002-07-02

Stinson, Frankie L. (Department: 1746)

Etching a substrate: processes

Gas phase etching of substrate

Application of energy to the gaseous etchant or to the...

C216S080000, C438S723000, C438S737000, C438S743000

Reexamination Certificate

active

06413438

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of forming a via hole in a semiconductor integrated circuit element by dry etching, and particularly to a method of forming a via hole by dry etching an organic SOG; film having low-K (low dielectric constant) as an interlayer dielectric.
2. Description of the Related Art
“Wiring widths and wiring intervals have been so narrowed with high integration of a semiconductor integrated circuit. Wiring lengths are also becoming so long. As a result, the resistance of each wire or interconnection and the capacitance between adjacent interconnections are on the increase, and increases in wiring delay and power consumption due to these have become a main focus. As one method of lessening the influence exerted on device performance with such high integration, a method of bringing an insulating film formed between interconnections into low-K has been studied and developed.”
As materials each having low-K, may be mentioned an FSG film in which fluorine is contained in an oxide film (SiO2), an organic SOG (Spin On Glass) film, an organic insulating film or a porous film, etc.
A via hole has heretofore been formed by a dry etching technique after a CVD oxide film, an organic SOG film corresponding to a low-K film, and a capping oxide film have been deposited over a lower layer interconnection as interlayer dielectrics. An oxygen plasma treatment process for modifying the surface of the organic SOG film is carried out to prevent film peeling developed between the capping oxide film and the organic SOG film. As the organic SOG film, for example, one is used wherein a low-K material composed of an oxide film (SiO2) added with an alkyl group us is dissolved in an organic solvent.
Further, an upper layer interconnection is formed and electrically connected to the lower layer interconnection through each via hole. Dry etching is performed under a pressure of a few Pa through; the use of a mixed gas of C4F8, O2 and Ar corresponding to a general etching condition for an oxide film by, for example, parallel plate magnetron reactive ion etching (RIE) equipment.
“However, a problem arises in that when a low-K film such as an organic SOG film is introduced into a device, a side-etching called “bowing” would be easily formed at an interface between a capping oxide film
3
and an organic SOG film
2
during forming a via hole
5
by etching as shown in FIG.
1
. In
FIG. 1
, a lower level interconnect
1
for example is exposed through via hole
5
, and a CVD oxide film
4
is included as formed on capping oxide
3
.”
The side-etching occurs during via hole etching. Because the etching is easily done in the transverse direction upon dry etching for the formation of the via hole since the interface between the capping oxide and the SOG film becomes a very porous film due to the oxygen plasma treatment process or the like for modifying the surface of the organic SOG film. Further, this results from the existence of oblique incident ions at dry etching.
The shape of the bowing has raised problems such as corrosion developed by the reaction between the tungsten and organic SOG, peeling of a tungsten film, the occurrence of a cavity in the via hole, etc. when the tungsten film is embedded in the via hole.
SUMMARY OF THE INVENTION
An object of the present invention is to form a via hole satisfactory in shape without producing a side-etching called “bowing” developed upon dry etching for the formation of the via hole. Thus, when via hole is formed in an insulating film composed of an organic SOG film formed over an oxide film in laminated form by dry etching, the etching is executed in such a manner that a mixed gas of CHF3, CH2F2 and CO is used as an etching gas and the flow rate of CH2F2 becomes greater than or equal to 50% of the flow rate of CHF3+CH2F2. As a result, the problem on the bowing developed in the neighborhood of the interface between a capping oxide film and an organic SOG film can be prevented from arising. It is also possible to form a via hole stable in shape and high in reliability.
A typical one of inventions of the present application has been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.


REFERENCES:
patent: 5219792 (1993-06-01), Kim et al.
patent: 5413963 (1995-05-01), Yen et al.
patent: 5830807 (1998-11-01), Matsunaga et al.
patent: 5849637 (1998-12-01), Wang
patent: 5861345 (1999-01-01), Chou et al.
patent: 6010946 (2000-01-01), Hisamune et al.
patent: 6014979 (2000-01-01), Van Autryve et al.
patent: 6117793 (2000-09-01), Tang
patent: 6123862 (2000-09-01), Donohoe et al.
patent: 2001/0000246 (2001-04-01), Tang et al.
patent: 06-029400 (1994-02-01), None

Affiliated with

Also associated with

Rating

Method of forming via hole by dry etching does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming via hole by dry etching, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming via hole by dry etching will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2836986