Method of forming trench in semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S270000, C438S424000, C257SE21546, C257SE21646

Reexamination Certificate

active

11080891

ABSTRACT:
There are provided a method of forming a trench for a recessed channel of a transistor and a layout for the same. A layout for the recessed channel according to one aspect of the present invention is formed such that an open region is extended across at least one of a first active region in a lateral direction, and also across another second active region in parallel with the first active region in a diagonal direction, and the extension is cut not to reach an isolation region between two third active regions that are in parallel with the second active region in a diagonal direction, and have noses facing each other in a longitudinal direction, and the layout includes an alignment of a plurality of open regions, which are discontinuously aligned. An etch mask is formed using the layout, and a semiconductor substrate is etched using the etch mask, and a trench for a recessed channel is formed on the active region.

REFERENCES:
patent: 5442212 (1995-08-01), Eimori
patent: 6362506 (2002-03-01), Miyai
patent: 0949681 (1999-10-01), None
patent: 1020010003628 (2001-01-01), None
patent: 1020030092862 (2003-06-01), None

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