Method of forming through-silicon vias with stress buffer...

Details Method of forming through-silicon vias with stress buffer... Method of forming through-silicon vias with stress buffer...

2008-07-22

2008-07-22

Parekh, Nitin (Department: 2811)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S624000, C438S629000, C438S667000, C438S672000, C257S774000, C257SE21577

Reexamination Certificate

active

07402515

ABSTRACT:
A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.

REFERENCES:
patent: 4791248 (1988-12-01), Oldenettel
patent: 6358836 (2002-03-01), Lu et al.
patent: 6831363 (2004-12-01), Dalton et al.
patent: 6962865 (2005-11-01), Hanaoka et al.
patent: 7276787 (2007-10-01), Edelstein et al.
patent: 2001/0051393 (2001-12-01), Ogino et al.
patent: 2002/0155661 (2002-10-01), Massingill et al.
patent: 2003/0104649 (2003-06-01), Ozgur et al.
patent: 2005/0121768 (2005-06-01), Edelstein et al.
patent: 2005/0153505 (2005-07-01), Gambino et al.
patent: 3050781 (1991-03-01), None
patent: 9833214 (1998-07-01), None
PCT/US2006/025471, PCT Search Report Dated: Nov. 23, 2006, 13 pages.

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