Fishing – trapping – and vermin destroying
Patent
1995-05-03
1996-12-10
Niebling, John
Fishing, trapping, and vermin destroying
437192, 437193, 437200, H01L 2128
Patent
active
055829716
ABSTRACT:
A method is provided for patterning a submicron semiconductor layer of an integrated circuit, and an integrated circuit formed according to the same. A conductive structure is formed on the integrated circuit. A dielectric layer is formed over the integrated circuit. A contact opening is formed in the dielectric layer exposing a portion of the underlying first conductive structure. A barrier layer is formed on the dielectric layer and in the contact opening. A substantially conformal layer is formed over the barrier layer and in the contact opening. The conformal layer is partially etched away wherein the conformal layer remains only in a bottom portion of the contact opening. A second conductive layer is formed over the barrier layer and the remaining conformal layer.
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Chen Fusen E.
Dixit Girish A.
Miller Robert O.
Bilodeau Thomas G.
Galanthay Theodore E.
Groover Robert
Jorgenson Lisa K.
Niebling John
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