Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2007-10-29
2010-06-01
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
Reexamination Certificate
active
07727903
ABSTRACT:
A method of forming a strain-causing layer for MOS transistors is provided, which is applied to a substrate having a plurality of gate structures of the MOS transistors thereon. A non-conformal stressed film that is thicker on the gate structures than between the gate structures is formed over the substrate. The non-conformal stressed film is then etched, without an etching mask thereon, to remove portions thereof between the gate structures and disconnect the stressed film between the gate structures. At least one extra stressed film may be further formed over the substrate, wherein each extra stressed film has the same type of stress as the above stressed film and is connected or disconnected between the gate structures.
REFERENCES:
patent: 5342478 (1994-08-01), Welbourn
patent: 2006/0091471 (2006-05-01), Frohberg et al.
patent: 2008/0020591 (2008-01-01), Balseanu et al.
patent: 2008/0054314 (2008-03-01), Frohberg et al.
Kuo Pei-Lin
Lu Huo-Tieh
Yang Jin-sheng
Garber Charles D
Shih Chun-Ming
Stevenson Andre′ C
United Microelectronics Corp.
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