Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-11
2006-07-11
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S254000, C438S396000
Reexamination Certificate
active
07074670
ABSTRACT:
In one embodiment, an etch stop layer and a mold layer is sequentially formed on a semiconductor substrate having an interlayer insulation layer. The interlayer insulation layer includes a conductive region formed therein. The mold layer is partially etched to expose a top surface of the etching stop layer. The exposed etching stop layer and an upper portion of the interlayer insulating layer are removed to form a first aperture part that exposes a portion of the conductive region. The conductive region exposed in the first aperture part is etched to form a second aperture part. A conductive layer for the capacitor storage node is deposited on the semiconductor substrate having the first and second aperture parts. The conductive layer provided on the mold layer is planarized to form separated capacitor storage nodes.
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Hwang Doo-Sup
Park Je-Min
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