Method of forming shallow trench isolation for integrated circui

Details Method of forming shallow trench isolation for integrated circui Method of forming shallow trench isolation for integrated circui

1998-05-15

2000-06-27

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438404, 438424, H01L 21336, H01L 2176

Patent

active

060806281

ABSTRACT:
A new and improved method for fabricating planarized isolation trenches, wherein erosion of insulating material at the edges of trenches is surpressed without sacrificing a minimal width of the isolation trench, has been developed. The process fabricates sidewall spacers before etching the isolation trench into the semiconductor substrate. After filling the etched trench with insulating material and plartarization of the insulating material, the sidewall spacers protect the insulating material filling the trench and prevent the formation of "divots" at the edges of the trench. Since the spacers are formed prior to the etching of the trench in the semiconductor substrate, a minimal width of the isolation trench can be maintained and less area is required for the isolation trench.

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patent: 5976948 (1999-11-01), Werner et al.
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