Method of forming self-aligned mask ROM

Details Method of forming self-aligned mask ROM Method of forming self-aligned mask ROM

1999-10-07

2002-07-16

Tsai, Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S276000, C438S278000

Reexamination Certificate

active

06420235

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88115533, filed Sep. 9, 1999, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method of forming a mask ROM. More particularly, the present invention relates to a method of forming a mask ROM that can be programmed by a self-aligned implantation.
2. Description of Related Art
Mask ROM is generally made from a number of channel transistors, each serving as a memory unit. When programming is required, ions are implanted into the channel region of selected memory cells so that threshold voltage of these cells is modified. The ‘on’ or ‘off’ state of each memory cell is thus set. In general, a memory cell is created whenever a word line (WL) crosses over a bit line (BL). The memory cell is formed in the word line covered area between two neighboring bit lines. Each memory cell is capable of storing a binary bit of data, either in a logic state of ‘0’ or ‘1’ depending on whether the channel region of the memory cell is implanted or not.
FIG. 1
is a schematic top view of a portion of a conventional mask ROM. As shown in
FIG. 1
, a set of parallel word lines
102
crosses over a set of perpendicular bit lines
104
. At their intersections, ion implant regions
110
are formed. Programming is done by implanting ions into selected ion implant regions
110
so that threshold voltage of the memory cell is modified and an ‘on’ or ‘off’ state of a memory cell is set.
However, as the production of a mask ROM progresses into the deep submicron level, the level of circuit integration becomes higher and dimensions of each device shrinks. Any slight misalignment of the ion beam is likely to send ions into a region shifted both horizontally (perpendicular to the bit line
104
) and vertically (perpendicular to the word line
102
) away from the desired ion implant region
110
. Besides the possibility of causing programming errors, misalignment may also result in interference with surrounding implant regions and hence may indirectly affect the operation of the memory. The effect is particularly serious when the shift is mainly in a vertical direction (that is, perpendicular to the word line
120
).
SUMMARY OF THE INVENTION
The present invention provides a method of forming a self-aligned mask ROM capable of reducing programming errors due to the misalignment between an ion implanting region and a bit line gate. Moreover, the method is also capable of preventing interference problems due to the diffraction of ions during ion implantation and the diffusion of ions within the substrate.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of forming a self-aligned mask ROM. Gate stacks that serve as word lines are formed over a substrate. Each gate stack includes a gate oxide layer, a gate conductive layer and a gate cap layer. Spacers are next formed on the sidewalls of the gate stacks. An insulation layer is deposited over the substrate and the gate stacks. The insulation layer is planarized to expose the gate cap layer. A patterned photoresist layer is formed over the insulation layer to expose the ion implant regions needed for programming. Using the patterned photoresist layer as an etching mask, the gate cap layer within each ion implant region is removed to expose the gate conductive layer using an etchant with high etching selectivity. Using the patterned photoresist layer as an implant mask, ions are implanted into the substrate via the ion implant regions so that the mask ROM is programmed. Since both sides of each gate stack are protected by the insulation layer, ions can reach the substrate through the gate stack, only. Hence, the memory programming is a self-aligned ion implant process. Finally, the photoresist layer is removed.
The advantage of the self-aligned mask ROM of this invention is that programming can be achieved through a simple ion implant operation. There is no need to worry about ion beam misalignment because ions can only get to the substrate via the word line gate of each ion implant region. Hence, conventional programming errors due to misalignment between an ion implant region and a corresponding word line gate and interference problems due to the diffraction of ions during ion implantation and the diffusion of ions within substrate thereafter can be eliminated.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5306657 (1994-04-01), Yang
patent: 5670402 (1997-09-01), Sogawa et al.
patent: 5681772 (1997-10-01), Chen et al.
patent: 5691216 (1997-11-01), Yen et al.
patent: 6091119 (2000-07-01), Wu

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