Method of forming NROM

Details Method of forming NROM Method of forming NROM

2001-06-18

2002-10-01

Chaudhari, Chandra (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S303000, C438S595000, C438S954000, C257S390000

Reexamination Certificate

active

06458661

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of forming a nitride read only memory (NROM). The present invention relates more particularly to a method of forming an isolated spacer on the NROM.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, it shows a cross-sectional view of the conventional NROM cell's structure. The NROM cell's forming process is described as follows: firstly, the active area is defined on the substrate
100
by using photolithography and, for example the wet etching method, and the phosphorous ions (P−) are doped into the substrate
100
by using the ion implantation to form the channel
104
. Subsequently, the first oxide layer
108
, the nitride layer
110
, and the second oxide layer
112
are deposited (Oxidation) on the substrate
100
in turn, wherein the nitride layer
110
is located between the first oxide layer
108
and the second oxide layer
112
. The first oxide layer
108
, the nitride layer
110
, and the second oxide layer
112
are defined by using photolithography and etching process to form an oxide
itride/oxide (ONO) structure
114
and expose the substrate
100
.
Next, the polysilicon layer
116
is deposited to cover the second oxide layer
112
, and the silicide layer
118
is deposited to cover the polysilicon layer
116
. Similarly, the polysilicon layer
116
and the silicide layer
118
are defined to form the gate
120
and expose the ONO structure
114
by using photolithography and etching process. Then, a material layer, such as the silicon dioxide (SiO
2
), the tetra-ethyl-ortho-silicate (TEOS), or the silicon nitride (Si
3
N
4
) etc., is deposited by such as the chemical vapor deposition (CVD) to cover the substrate
100
, the ONO structure
114
, and the gate
120
. The material layer is defined by using photolithography and the anisotropic etching method to form the spacer
122
.
Subsequently, the high concentration and great depth heavy doping is performed on the substrate
100
by using the structure consisting of the spacer
122
and the gate
120
as the mask, and the phosphorous (P) or the arsenic (As) that has greater solid solubility to the silicon (Si) as the ion source, so that the drain
102
and the source
106
are completed. An insulated layer
124
is deposited to cover the substrate
100
, the spacer
122
, and the silicide layer
120
, and then the inter-level dielectrics (ILD) layer
126
is deposited to cover the insulated layer
124
. Developed to this present, the conventional NROM cell structure is completed.
However, about the following process, the NROM device usually endures ultra-violet light illumination or penetrating plasma used to excite the NROM device's atoms, so as to make the device's atoms become charging ions that increase the NROM device's chargers. They also affect the device's stability, and damage the device.
SUMMARY OF THE INVENTION
According to the conventional method of forming the NROM cell, the NROM cell cannot resist the ultra-violet light or penetrating plasma, so increases in the charges result in the device's electrical instability, and decrease the product yield.
Accordingly, one aspect of the invention is to provide a NROM forming method, on forming the NROM cell, the present invention's method forms the protective layer on the gate and the ONO structure, and the protective layer can resist the ultra-violet light illumination and the penetrating plasma to prevent the NROM device atoms from being excited and thus become charging ions, so that the device's electrical stability can be protected and maintained.
Another aspect of the invention is to provide a NROM forming method, and the NROM cell formed by using the present invention's method has a protective layer. The protective layer composed of one or a plurality of isolated material layers and a silicon nitride (Si
3
N
4
) spacer is located on the gate and ONO structure. Therefore, it is not only can prevent the ultra-violet light or penetrating plasma, but it also can avoid side effects, such as the increasing threshold voltage, induced by the direct contact of the silicon nitride (Si
3
N
4
) spacer and, for example, ONO device, and can also avoid the device's damage by leakage current.
For at least the foregoing aspects discussed above, the present invention provides a NROM forming method. The present invention's method firstly forms at least one isolated layer on the ONO structure and gate of the NROM cell, and forms a silicon nitride spacer, such as the silicon oxide (SiO
y
), to constitute a protective structure, wherein the isolated layer is used to isolate the NROM cell and silicon nitride spacer. As the silicon nitride (Si
3
N
4
) contacts with the NROM device directly, the device's threshold voltage increases. Therefore, it can prevent the ultra-violet light or plasma damage and avoid increase in the device's threshold voltage simultaneously, and can avoid leakage current induced between the devices that damage the devices by applying the present invention.


REFERENCES:
patent: 6399466 (2002-06-01), Nakamura

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