Method of forming non-volatile memory cell using sacrificial...

Details Method of forming non-volatile memory cell using sacrificial... Method of forming non-volatile memory cell using sacrificial...

2007-02-27

2007-02-27

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S296000, C257SE21179, C257SE21209, C257SE21682

Reexamination Certificate

active

11284982

ABSTRACT:
A method of forming a microelectronic non-volatile memory cell, a memory cell formed according to the method, and a system including the memory cell. The method comprises: providing a substrate; providing a pair of spaced apart isolation bodies on the substrate, the isolation bodies including respective raised isolation portions, providing the pair comprising providing a buffer layer on the substrate; providing pillar spacers on side walls of the raised isolation portions; removing the buffer layer after providing the pillar spacers; removing the pillar spacers during removing the buffer layer; providing a tunnel dielectric on the surface of the substrate after removing the buffer layer; providing a floating gate on the tunnel dielectric; reducing a height of the isolation bodies to yield corresponding isolation regions; providing source and drain regions on opposite sides of the floating gate; providing an interpoly dielectric on the floating gate; and providing a control gate on the interpoly dielectric to yield the memory cell.

REFERENCES:
patent: 5210047 (1993-05-01), Woo et al.
patent: 6096623 (2000-08-01), Lee
patent: 2003/0119256 (2003-06-01), Dong et al.

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