Method of forming multiple gate insulators on a strained...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Reexamination Certificate

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06849508

ABSTRACT:
A method is disclosed for forming multiple gate insulators on a strained semiconductor heterostructure as well as the devices and circuits formed therefrom. In an embodiment, the method includes the steps of depositing a first insulators on the strained semiconductor heterostructure, removing at least a portion of the first insulators from the strained semiconductor heterostructure, and depositing a second insulators on the strained semiconductor heterostructure.

REFERENCES:
patent: 4471373 (1984-09-01), Shimizu et al.
patent: 4525811 (1985-07-01), Masuoka
patent: 4806500 (1989-02-01), Scheibe
patent: 5239195 (1993-08-01), Compagne
patent: 5442205 (1995-08-01), Brasen et al.
patent: 5576573 (1996-11-01), Su et al.
patent: 5723355 (1998-03-01), Chang et al.
patent: 5989962 (1999-11-01), Holloway et al.
patent: 6025234 (2000-02-01), Chou
patent: 6303521 (2001-10-01), Jenq
patent: 6429098 (2002-08-01), Bensahel et al.
patent: 6465323 (2002-10-01), Yu et al.
patent: 6472327 (2002-10-01), Ko et al.
patent: 20010003364 (2001-06-01), Sugawara et al.
patent: 20010018245 (2001-08-01), Kimizuka
patent: 20010039093 (2001-11-01), Oohashi
patent: 20010045582 (2001-11-01), Schmidt et al.
patent: 20010048119 (2001-12-01), Mizuno et al.
patent: 20010053579 (2001-12-01), Toda et al.
patent: 20020008289 (2002-01-01), Murota et al.
patent: 20020022376 (2002-02-01), Oh
patent: 20020105041 (2002-08-01), Goto et al.
patent: 20020140031 (2002-10-01), Rim
patent: 20020160584 (2002-10-01), Kanzawa et al.
patent: 20020185686 (2002-12-01), Christiansen et al.
patent: 20030003679 (2003-01-01), Doyle et al.
patent: 0 114 491 (1983-12-01), None
patent: 0 256 363 (1988-02-01), None
Maiti et al., “Topical Review, Strained-Si heterostructure field effect transistors”, 1998, Semiconductor Science Technology vol. 13, pp. 1225-1246.*
Welser et al. “Strain Dependence of the Performance Enhancement in Strained-Si n-MOSFETs”, 1994IEDM Tech. Dig., pp. 373-376.

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